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Search - systemc - List
【
Documents
】
SystemC
DL : 0
system c 语言学习资料,英文扫描版本-system c language learning materials, English scanned version
Update
: 2024-05-08
Size
: 5989376
Publisher
:
hyml
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Other
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SystemC_v1_0_Training
DL : 0
systemc 是基于VC的硬件描述语言,类似与VHDL VERILOG 等,他是VC提供的类库,抽象出硬件接口-SystemC is based on the VC s hardware description language, similar to VHDL VERILOG and so on, he is a VC class library provided by abstract out the hardware interface
Update
: 2024-05-08
Size
: 5618688
Publisher
:
不知道
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Other Embeded program
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SystemCcode
DL : 0
SystemC片上系统设计源代码 希望对大家有帮助哈-System-on-Chip Design SystemC source code would like to have everyone help Kazakhstan
Update
: 2024-05-08
Size
: 2640896
Publisher
:
awhen
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VHDL-FPGA-Verilog
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ModelSim
DL : 0
ModelSim下用SystemC做设计验证方法与示例-ModelSim using SystemC to do design verification methods and sample
Update
: 2024-05-08
Size
: 1139712
Publisher
:
邹积银
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ARM-PowerPC-ColdFire-MIPS
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Cache_MIPS
DL : 0
SystemC 实现 MIPS 处理器 源代码-SystemC source code to achieve MIPS processor
Update
: 2024-05-08
Size
: 8221696
Publisher
:
pigoneand
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VHDL-FPGA-Verilog
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systemc_ex
DL : 0
systemc源码, 入门级, 超好用! systemc源码, 入门级, 超好用! 易懂-SystemC source, entry-level,超好用! SystemC source, entry-level,超好用! Understand
Update
: 2024-05-08
Size
: 531456
Publisher
:
chenai
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Process-Thread
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clock
DL : 0
使用systemC模擬多重現成-SystemC simulation of multi-use off-the-shelf
Update
: 2024-05-08
Size
: 2522112
Publisher
:
蔡勝凡
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Other Embeded program
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led_scan88_rom
DL : 0
基于Systemc的8*8LED扫描电路课程设计的设计文件,望共同学习-SystemC Based on the 8* 8LED scanning circuit design curriculum design documents, look common learning
Update
: 2024-05-08
Size
: 4784128
Publisher
:
poleon
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Other Embeded program
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systemc-2.2.0
DL : 0
system C源码 一种替代verilog的语言
Update
: 2024-05-08
Size
: 2481152
Publisher
:
fighter
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Other
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examples
DL : 0
systemc model of a fifo channel
Update
: 2024-05-08
Size
: 248832
Publisher
:
【
Other
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at_example
DL : 0
这是一个systemc语言的几个实例。都能正常运行。-This is a few examples SystemC language. Able to operate normally.
Update
: 2024-05-08
Size
: 29696
Publisher
:
surry
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Other
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systemc_logic_analyzer_1_0.tar
DL : 0
这是几个systemc的程序,一定有用。-This is the procedure several SystemC certainly useful.
Update
: 2024-05-08
Size
: 2659328
Publisher
:
surry
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Other
】
xitongC
DL : 0
《SystemC片上系统设计》——高等院校教材 陈曦, 徐宁仪,科学出版社,源代码-source code of 《SystemC片上系统设计》,陈曦, 徐宁仪,
Update
: 2024-05-08
Size
: 2488320
Publisher
:
god
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OS program
】
vh2sc
DL : 0
将VHDL转换为C的软件 将VHDL转换为C的软件-VH2SC is a free basic VHDL to SystemC converter. The converter handles a small subset of Synthesisable VHDL 87/93 language constructs. The current version translates all VHDL IEEE types to sc_int/sc_uint/integers and booleans this in order to maximise performance. The aim of the converter is to produce a cycle accurate model of synthesisable VHDL code. The converter runs on Windows Example1: Simple counter Convert the counter.vhd file to SystemC, c:VHDL2SystemCexample1>vh2sc-v-mti count.vhd VH2SC-> VHDL to SystemC Converter Ver 0.21** Alpha Release** (c)HT-Lab 2007 SQLite Version : 3.3.13 Parsing File : count.vhd Line 9** Info : library ieee ignored Line 28** Info : VH2SC Translation Disabled Line 32** Info : VH2SC Translation Re-Enabled Line 37** Info : process() translated to process_line37 Writing Header File : cnt.h Writing C++ File : cnt.cpp ** Info : Modelsim SC_MODULE_EXPORT(cnt) macro added The-v is a verbose flag and-mti is requi
Update
: 2024-05-08
Size
: 819200
Publisher
:
whiz
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Other
】
adder
DL : 0
this code written in systemc language and it is a wewest language that important to simulate the system
Update
: 2024-05-08
Size
: 1024
Publisher
:
zooz
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Other
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6_on_chip_bus
DL : 0
《systemc片上系统设计》(科学出版社)一书第六章TLM级总线建模源码-" Systemc system-on-chip design" (Science Press) First Chapter VI book TLM modeling of source-level bus
Update
: 2024-05-08
Size
: 32768
Publisher
:
yu
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Other Embeded program
】
fulladder
DL : 0
一个全加器的systemc代码,包括模块的定义以及测试平台-A source code about full adder using systemc language , including the definition of modules as well as the test platform
Update
: 2024-05-08
Size
: 2048
Publisher
:
刘飞阳
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Other
】
TLM-2[1].0.tar
DL : 0
SystemC Transaction Level Modelling. 是基于SystemC之上的总线互联协议-SystemC Transaction Level Modelling. Is based on the SystemC bus interconnection agreements on
Update
: 2024-05-08
Size
: 6182912
Publisher
:
jx.liang
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Other
】
HardwareSoftware_Co-Design_Research_for_Embedded_S
DL : 0
嵌入式系统的硬/软件协同设计研究(复旦博士论文) 需CAJ软件查看 嵌入式计算机系统是用于完成特定功能的计算机系统,例如,激光打印机、移动电话、微波炉、汽车的防抱死控制器等,它一般是由微处理器、ASIC、总线、存储器等组成。随着微电子技术中的深亚微米技术的发展,嵌入式系统可以被集成到一块芯片上,形成片上系统“SOC”。如果说靠手工可以满足一些简单的,低性能的嵌入式系统的设计的话,那么,对于复杂的、高性能的嵌入式系统,手工设计将会非常困难。解决这个问题的有效方法是采用嵌入式系统的设计自动化技术。 嵌入式系统的设计自动化技术可以缩短系统的开发周期,降低开发费用,提高设计质量,使产品具有更强的市场竞争力。因此,它已经成为当前EDA领域的热点研究问题。目前,国内外许多大学、公司都有项目组在从事这项技术的研究工作。本文研究了嵌入式系统自动化设计技术中的一些问题,主要进行了以下4个方面的工作: 1.介绍和分析了具有代表性的嵌入式系统设计自动化系统,如Cool、Cosyma、SpecSyn、Chinook、Polis和Corsair等。提出了一个基于UML系统描述的,SystemC模拟验证的,利用CoCentric SystemC Complier进行硬-Hardware/Software Co-Design Research for Embedded Systems
Update
: 2024-05-08
Size
: 5460992
Publisher
:
【
Linux-Unix
】
uartphysical.tar
DL : 0
本程序用systemC仿真UART的功能,运行环境为Linux-This procedure systemC simulation using the UART function, as the Linux operating environment
Update
: 2024-05-08
Size
: 21504
Publisher
:
liqingqian
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