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【Linux-Unix】 SystemCproblem DL : 0: 关于systemc的一些资料，感觉还不错-Some information on the systemc feeling pretty good
Update : 2024-05-19 Size : 148480 Publisher : liudehua
【Software Engineering】 SCV(1) DL : 0: 关于systemc的一些好的学习资料，愿与大家分享！-About systemc' s some good learning materials, is willing to share with you!
Update : 2024-05-19 Size : 142336 Publisher : liudehua
【Software Engineering】 SCV(2) DL : 0: 关于systemc的一些好的学习资料，愿与大家分享！-About systemc' s some good learning materials, is willing to share with you!
Update : 2024-05-19 Size : 113664 Publisher : liudehua
【Software Engineering】 SCV(3) DL : 0: 关于systemc的一些好的学习资料，愿与大家分享！-About systemc' s some good learning materials, is willing to share with you!
Update : 2024-05-19 Size : 386048 Publisher : liudehua
【Software Engineering】 SystemC_design DL : 0: 关于systemc片上系统设计的一些内容-With regard to on-chip system design systemc some of the elements
Update : 2024-05-19 Size : 119808 Publisher : liudehua
【Software Engineering】 SystemC_language DL : 0: 关于使用systemc语言进行建模的内容-Systemc language modeling on the use of the contents of
Update : 2024-05-19 Size : 210944 Publisher : liudehua
【Linux-Unix】 embecosm-systemc-jtag-cycle-acc-ean5-issue-1.mf.ht DL : 0: or1k的周期精确级建模调试jtag工具-or1k-level modeling of cycle-accurate debugging tools jtag
Update : 2024-05-19 Size : 846848 Publisher : hongjinxi
【VHDL-FPGA-Verilog】 xge_mac DL : 0: 10G MAC ip核源码其中包含了三个版本。经过测试正确无误。-======================== 10GE MAC Core ======================== ------------------------ 1. Directory Structure ------------------------ The directory structure for this project is shown below. . |-- doc - Documentation files | |-- rtl | |-- include - Verilog defines and utils | `-- verilog - Verilog source files for xge_mac | |-- sim | |-- systemc - SystemC simulation directory | `-- verilog - Verilog simulation directory | `-- tbench |-- systemc - SystemC test-bench source files `-- verilog - Verilog test-bench source files ------------------------ 2. Simulation ------------------------ There are two simulation environments that can be used to validate the code. The verilog simulation is very basic and meant for those who want to look at how the MAC operates without going through the effort of setting up SystemC. The SystemC environment is more sophisticated and covers
Update : 2024-05-19 Size : 899072 Publisher : xuchao
【Other】 OVM_2.0_Golden_Reference_Guide DL : 0: Doulos OVM Golden Refernce
Update : 2024-05-19 Size : 636928 Publisher : sunFire
【Software Engineering】 verilator_doc.pdf DL : 0: verilator systemc 快速模拟器使用说明英文版。避免中文版翻译上的偏差。-verilator systemc fast simulator for use English. Chinese translation, to avoid bias.
Update : 2024-05-19 Size : 195584 Publisher : ping xiao
【Software Engineering】 SystemPerl-1.282.tar DL : 0: verilator systemc 快速模拟器部件systermPerl安装源码。是verilator systemc 快速模拟器需要的。-verilator systemc Simulator of parts systermPerl installation source. Verilator systemc fast simulator is needed.
Update : 2024-05-19 Size : 109568 Publisher : ping xiao
【ARM-PowerPC-ColdFire-MIPS】 noxim-20100324.tar DL : 0: 基于systemc的noxim 片上网络模拟器最新版-20100324-a systemc based on chip network simulator called noxim-20100324
Update : 2024-05-19 Size : 349184 Publisher : panzhenyu
【ARM-PowerPC-ColdFire-MIPS】 TLMfifo DL : 0: 使用SystemC语言编写的一个FIFO的交易级的模块，虽然没有进行通信细化，但是已经可以实现FIFO功能的基本仿真。-SystemC language to use a FIFO transaction-level module, although no communication refinement, but has been able to achieve FIFO functionality of the basic simulation.
Update : 2024-05-19 Size : 413696 Publisher : chenren
【VHDL-FPGA-Verilog】 A_SystemC_Primer DL : 0: 本书籍主要讲的是SYSTEMC也是一种硬件描述语言，此语言跟VERILOG和VHDL相比很多优点，尤其是在写测试代码方面。一共三本，希望对大家有帮助。-This book is mainly about SYSTEMC is also a hardware description language, this language VERILOG and VHDL, compared with many advantages, particularly in the area to write test code. A total of three, we want to help.
Update : 2024-05-19 Size : 5991424 Publisher : songtao
【Windows Develop】 tcl_libs.tar DL : 0: The Gtkwave is a waveform viewer for the VCD data files. The VCD files are the results from compiling the SystemC programs. The SystemC programs are used to simulate the digital integrated circuits. The Ggtkwave includes three zip files. a. Gtkwave .exe b. Tcl_libs.tar c. Libs.tar -1. You unzip these files into a folder Gtk. 2. Copy all the files inside BIN folder into Gtk. 3. Copy the lib folder into the C:4. Run grkwave.exe
Update : 2024-05-19 Size : 1167360 Publisher : Kwan LO
【VHDL-FPGA-Verilog】 Synopsys-RTLSystemC DL : 0: synopsys的systemc和RTl书籍清晰电子版，专业权威的EDA公司的培训资料-synopsys of systemc and RTl clear electronic version of books, professional authority of the EDA company' s training materials
Update : 2024-05-19 Size : 329728 Publisher : hyalite
【Software Engineering】 code DL : 0: example code for SYSTEMC. Hardware description language
Update : 2024-05-19 Size : 55296 Publisher : marlin
【VHDL-FPGA-Verilog】 C_Based_System_Level_Design DL : 0: SYSTEMC设计手册 C_Based_System_Level_Design-C_Based_System_Level_Design
Update : 2024-05-19 Size : 348160 Publisher : zhang
【VHDL-FPGA-Verilog】 ModelSim-code DL : 0: 用modelsim以及systemC发在一些小例子和使用心得-Made with modelsim and systemC use in some small examples and experiences
Update : 2024-05-19 Size : 1139712 Publisher : 王天
【Linux-Unix】 examples DL : 0: systemc examples very useful
Update : 2024-05-19 Size : 2625536 Publisher : pratap

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