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【VHDL-FPGA-Verilog】 shiftregister DL : 0: Shift Register. VHDL code and its testbench.
Update : 2024-05-05 Size : 1024 Publisher : mehmet
【VHDL-FPGA-Verilog】 UniversalRegister DL : 0: 普通的缓冲器这种设计是一个普通的缓冲器，可以做一个直接的缓冲器，也可以做一个双向的转移缓冲器，还可以做一个递增的计数器和递减计数器-Universal Register This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter.
Update : 2024-05-05 Size : 1024 Publisher : 杜翔
【Shop supermarket software system】 POS DL : 0: 简单的餐厅POS收银软件，里面用到了换肤控件、通用登录函数，还有很多值得学习参考的代码，虽然这个收银系统功能上并没有100 完成，但这也很不错了，界面看上去很舒服，也算是同VB同行交流一下吧。-Simple restaurant POS cash register software, which controls use of the skin, common log function, there are many worthy of study and reference the code, although the cash register system, there is no 100 complete, but it is also very good, the interface looks very uncomfortable, it can be considered peers with VB you.
Update : 2024-05-05 Size : 559104 Publisher : 983
【Hotel software system】 Resturant DL : 0: 一个简单的快餐店收银软件，当年只是帮一个朋友开发的，一直没有完善。-A simple fast food restaurant cash register software, was only developed to help a friend, has not been perfect.
Update : 2024-05-05 Size : 441344 Publisher : 586
【VHDL-FPGA-Verilog】 register DL : 0: it is source code of 32 bit register and testbench for tht register written in verilog.
Update : 2024-05-05 Size : 13312 Publisher : bhaskar
【Windows Develop】 Register DL : 1: 本程序为软件注册模块,可获取CPU、磁盘序列号和网卡地址,生成注册码，用于限制程序的使用，保护软件版权。-This procedure for the registration of software modules, available CPU, disk and network card serial number address, generate registration key, used to restrict the use of procedures, the protection of software copyright.
Update : 2024-05-05 Size : 642048 Publisher : 黎民百姓
【VHDL-FPGA-Verilog】 mux_reg DL : 0: VHDL code for a multiplexer and a parallel/serial in parallel/serial out shift register
Update : 2024-05-05 Size : 1024 Publisher : Davood
【VHDL-FPGA-Verilog】 shift_register DL : 0: shift register it is shifte register for vhdl coding
Update : 2024-05-05 Size : 201728 Publisher : han
【Other】 shift_registers DL : 0: Universal Shift Register
Update : 2024-05-05 Size : 3152896 Publisher : florin
【VHDL-FPGA-Verilog】 Sequence-detector-design DL : 0: 序列检测器设计的思路大多都是用FSM来实现的,此思路是通过移位寄存器来实现序列检测-Sequence detector design ideas are often used to achieve the FSM, the idea is to achieve through the shift register sequence detection
Update : 2024-05-05 Size : 30720 Publisher : lsp
【Shop supermarket software system】 ESCS DL : 0: 这是一个超市收银系统，主要任务是管理后台仓库，前台销售，人员管理，商品管理，帐单管理和数据库管理。-This is a supermarket cash register system, the main task is to manage the background storage, front desk sales, personnel management, merchandise management, billing management and database management.
Update : 2024-05-05 Size : 11087872 Publisher : 风起云
【Windows Develop】 OCX-DLL-Register DL : 0: 一个小工具,可方便地注册OCX和DLL文件.-A small tool to easily register OCX and DLL files.
Update : 2024-05-05 Size : 7168 Publisher : sunwe
【SCM】 74ls164 DL : 0: 74HC595是具有8位移位寄存器和一个存储器，三态输出功能。-74HC595 is an 8-bit shift register and a memory, three-state output.
Update : 2024-05-05 Size : 100352 Publisher : zhangqiang
【JSP/Java】 register DL : 0: 使用struts2开发的登入界面，适合初学者看的，简单-Struts2 login to use development interface, suitable for beginners to read, simple
Update : 2024-05-05 Size : 3371008 Publisher : 肖彭燕
【WEB Code】 register DL : 0: asp注册登陆系统检验用户ID 密码邮箱是否正确检测用户ID 邮箱是不否被占用-asp registered user ID landing system on the mailbox password is correct detection of the user ID mailbox is not whether occupied
Update : 2024-05-05 Size : 31744 Publisher : wf99x
【VHDL-FPGA-Verilog】 HDB3 DL : 0: 用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
Update : 2024-05-05 Size : 1024 Publisher : 空
【VHDL-FPGA-Verilog】 shifter DL : 0: vhdl,双向移位寄存器，实现置数，左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation
Update : 2024-05-05 Size : 32768 Publisher : 王晓虎
【2D Graphic】 registrationprot DL : 0: registration image.two image register
Update : 2024-05-05 Size : 44032 Publisher : ali
【VHDL-FPGA-Verilog】 unishift DL : 0: An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.
Update : 2024-05-05 Size : 1024 Publisher : sidd
【Oracle】 LinuxPos DL : 1: POS收银系统开发平台:Redhat9 开发语言:标准C 数据库:Oracle 8i 开发周期:2009年6月-2009年7月关键技术:ncurses库，Pro*C ,通用双向链表项目简介:使用ncurses绘制界面，通过Pro*C访问 Oracle数据库，数据保存在通用双链表中，实现超市日常经营情况管理，报表生成，以及后台管理功能。功能模块:用户登录模块，前台收银模块（收银、挂单、取单、退货），后台管理模块-POS cash register system development platform: Redhat9 Development Language: Standard C Database: Oracle 8i development cycle: June 2009-2009 year in July key technologies: ncurses library, Pro* C, universal two-way linked list the project: the use of ncurses drawing interface, through the Pro* C to access Oracle databases, data stored in the common double-linked list, achieving the daily operation of the supermarket management, report generation, as well as the background management functions. Functional modules: user login module, front desk cashier module (cashier, lodging take orders, returns), background management module
Update : 2024-05-05 Size : 89088 Publisher : 杜峰

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