Xilinx-XUPV2P-based development platform for embedded systems experimental routines: Experiment 3 for the system to create and add their own customized IP

lab3
....\automake.log
....\bitinit.log
....\blkdiagram
....\..........\MdtXdsSVG_Render.css
....\..........\svg10.dtd
....\..........\system.html

....\..........\system.svg
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....\....\system.ucf
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....\.......\my_led_v1_00_a
....\.......\..............\data
....\.......\..............\....\my_led_v2_1_0.mdd
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....\.......\..............\...\Makefile
....\.......\..............\...\my_led.c
....\.......\..............\...\my_led.h
....\.......\..............\...\my_led_selftest.c
....\etc
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....\...\download.cmd
....\...\fast_runtime.opt
....\hdl
....\...\dcm_0_wrapper.vhd
....\...\dip_push_wrapper.vhd
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....\...\.........\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_1_bram_elaborate.v
....\...\.........\plb_bram_if_cntlr_2_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_2_bram_elaborate.v
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....\...\plb_bram_if_cntlr_1_wrapper.vhd
....\...\plb_bram_if_cntlr_2_bram_wrapper.v
....\...\plb_bram_if_cntlr_2_wrapper.vhd
....\...\plb_wrapper.vhd
....\...\ppc405_0_wrapper.vhd
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....\...\system.v
....\implementation
....\..............\bitgen.ut
....\..............\cache
....\..............\.....\cache.cat
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....\..............\.....\dip_push_wrapper.ngc
....\..............\.....\jtagppc_0_wrapper.ngc
....\..............\.....\my_led_0_wrapper.ngc
....\..............\.....\opb_wrapper.ngc
....\..............\.....\plb2opb_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_1_bram_wrapper.ngc
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....\..............\.....\plb_bram_if_cntlr_2_bram_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_2_wrapper.ngc
....\..............\.....\plb_wrapper.ngc
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....\..............\.....\reset_block_wrapper.ngc
....\..............\.....\rs232_uart_1_wrapper.ngc
....\..............\dcm_0_wrapper
....\..............\.............\dcm_0_wrapper.ngc
....\..............\dcm_0_wrapper.ngc
....\..............\dip_push_wrapper
....\..............\................\dip_push_wrapper.ngc
....\..............\dip_push_wrapper.ngc
....\..............\download.bit
....\..............\fpga.flw
....\..............\jtagppc_0_wrapper
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....\..............\jtagppc_0_wrapper.ngc
....\..............\my_led_0_wrapper
....\..............\................\my_led_0_wrapper.ngc
....\..............\my_led_0_wrapper.ngc
....\..............\netlist.lst
....\..............\opb_wrapper
....\..............\...........\opb_wrapper.ngc
....\..............\opb_wrapper.ngc
....\..............\plb2opb_wrapper
....\..............\...............\plb2opb_wrapper.ngc
....\..............\plb2opb_wrapper.ngc
....\..............\plb_bram_if_cntlr_1_bram_wrapper
....\..............\................................\plb_bram_if_cntlr_1_bram_wrapper.ngc
....\..............\................................\plb_bram_if_cntlr_1_bram_wrapper_vhdl.prj
....\..............\plb_bram_if_cntlr_1_bram_wrapper.ngc
....\..............\plb_bram_if_cntlr_1_wrapper
....\..............\...........................\plb_bram_if_cntlr_1_wrapper.ngc
....\..............\plb_bram_if_cntlr_1_wrapper.ngc
....\..............\plb_bram_if_cntlr_2_bram_wrap

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