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【Crack Hack】 DES_verilog DL : 0: this DES made by verilog
Update : 2008-10-13 Size : 15833 Publisher : Shawn
【Crack Hack】 DES_verilog DL : 0: this DES made by verilog
Update : 2024-04-25 Size : 15360 Publisher : Shawn
【Crack Hack】 DES_Verilog DL : 0: 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test report, which not only have a simple Notes program [is mainly directed against the waveform simulation], I write is the main control part key generation is partly based on the next version of the original Yasuhiro procedures. The program can also be encrypted can be decrypted, CycloneII optional devices which can run more than 100Mhz.
Update : 2024-04-25 Size : 296960 Publisher : jesse
【VHDL-FPGA-Verilog】 DES_Verilog DL : 0: des加密算法verilog实现，包括模块定义，端口说明-des Encryption and decryption
Update : 2024-04-25 Size : 20480 Publisher : 王彬
【VHDL-FPGA-Verilog】 DES_verilog DL : 0: 用verilog实现的DES(Data Encryption Standard数据加密标准)，把64位明文输入变为64位密文输出块。-Using DES (Data Encryption Standard Data Encryption Standard) verilog to achieve, the 64 plaintext input into 64 output ciphertext block.
Update : 2024-04-25 Size : 477184 Publisher : 荣志强