SHIFT_8REG is eight with a displacement of the functional Register, Each will enter the data from the register into the lowest point, and the left shift accordingly. ODD_110BREG is a three backup Register, the Register is stored in the odd frame synchronization head, is 110. EVEN_9BHREG 8 is a backup Register, which register is kept even the first frame synchronization, is 10011011. This register the two initial value of the system into a start.

PCM30
.....\01一字节搜索成功.bmp
.....\02二字节搜索成功.bmp
.....\03三字节搜索成功.bmp
.....\04进入同步状态.bmp
.....\05同步状态循环.bmp
.....\06一字节检查失败.bmp
.....\07二字节检查失败.bmp
.....\08三字节检查失败.bmp
.....\09四字节检查失败.bmp
.....\10偶同步成功.bmp
.....\11一字节搜索成功.bmp
.....\12二字节搜索失败.bmp
.....\13偶同步搜索失败.bmp
.....\DC综合结构.bmp
.....\DC综合结果.bmp
.....\PCM30
.....\.....\pcm30.cr.mti
.....\.....\pcm30.mpf
.....\.....\src
.....\.....\...\PCM30.vhd
.....\.....\...\PCM30_TB.vhd
.....\.....\transcript
.....\.....\vsim.wlf
.....\.....\wave01.wlf
.....\.....\work
.....\.....\....\pcm30
.....\.....\....\.....\rtl.asm
.....\.....\....\.....\rtl.dat
.....\.....\....\.....\_primary.dat
.....\.....\....\pcm30_tb
.....\.....\....\........\behavior.asm
.....\.....\....\........\behavior.dat
.....\.....\....\........\_primary.dat
.....\.....\....\_info
.....\PCM30.vhd
.....\PCM30基群帧同步电路设计报告.doc
.....\RTL结构图.vsd
.....\SSDT_TB.vhd
.....\transcript
.....\vish_stacktrace.vstf
.....\新建 文本文档.txt
.....\状态图.vsd

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