Title: progam3_PL_DDR3 Download
 Description: Implementation of data cache function in DDR3 based on zynq hardware platform
 Downloaders recently: [More information of uploader 阿尔法猫]]
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文件名大小更新时间
progam3_PL_DDR3\PL_DDR3.ucf 16685 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\c1631407781d44af.xci 4752 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\ddr3.dcp 3341745 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\ddr3_sim_netlist.v 7229181 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\ddr3_sim_netlist.vhdl 8193874 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\ddr3_stub.v 3162 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\ip\2018.3\c1631407781d44af\ddr3_stub.vhdl 3402 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\gui_handlers.wdf 3965 2021-03-03
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\java_command_handlers.wdf 867 2021-03-03
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\project.wpc 121 2021-03-03
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\synthesis.wdf 5381 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\synthesis_details.wdf 100 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.cache\wt\webtalk_pa.xml 4203 2021-03-03
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.hw\PL_DDR3_read_write_test.lpr 343 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\ip\ddr3\ddr3.veo 7095 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\ip\ddr3\ddr3_stub.v 3140 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\ip\ddr3\ddr3_stub.vhdl 3306 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\mem_init_files\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\README.txt 130 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\compile.do 8404 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\ddr3.sh 4950 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\ddr3.udo 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\simulate.do 284 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\activehdl\wave.do 32 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\ddr3.sh 5564 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\README.txt 2097 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\ies\run.f 8447 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\compile.do 8444 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\ddr3.sh 5111 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\ddr3.udo 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\simulate.do 294 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\modelsim\wave.do 32 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\compile.do 8430 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\ddr3.sh 5224 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\ddr3.udo 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\elaborate.do 166 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\simulate.do 185 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\questa\wave.do 32 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\README.txt 3236 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\compile.do 8398 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\ddr3.sh 4949 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\ddr3.udo 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\simulate.do 284 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\riviera\wave.do 32 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\ddr3.sh 15479 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\vcs\simulate.do 11 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\ddr3.sh 5573 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\README.txt 2097 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xcelium\run.f 8455 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\cmd.tcl 464 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\ddr3.sh 6108 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\elab.opt 178 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\file_info.txt 11722 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\glbl.v 1474 2018-12-07
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\mig_a.prj 10481 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\README.txt 2156 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\vlog.prj 8285 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.ip_user_files\sim_scripts\ddr3\xsim\xsim.ini 22867 2018-12-08
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\.jobs\vrs_config_1.xml 379 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\.jobs\vrs_config_2.xml 369 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\.jobs\vrs_config_3.xml 383 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\.jobs\vrs_config_4.xml 390 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\.vivado.begin.rst 182 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\.vivado.end.rst 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\.Vivado_Synthesis.queue.rst 0 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\.Xil\ddr3_propImpl.xdc 20847 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ddr3.dcp 3344654 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ddr3.tcl 10672 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ddr3.vds 647218 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ddr3_utilization_synth.pb 289 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ddr3_utilization_synth.rpt 9959 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\gen_run.xml 1971 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\htr.txt 385 2020-12-06
progam3_PL_DDR3\PL_DDR3_read_write_test\PL_DDR3_read_write_test.runs\ddr3_synth_1\ISEWrap.js 7308 2020-12-06

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