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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-09-21
  • Size : 274kb
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  • Author :cadetblues
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Introduction - If you have any usage issues, please Google them yourself
Using a half adder to build a full adder, using the Verilog language
Packet file list
(Preview for download)
lab1\db\fulladder.asm.qmsg
lab1\db\fulladder.asm.rdb
lab1\db\fulladder.asm_labs.ddb
lab1\db\fulladder.cbx.xml
lab1\db\fulladder.cmp.bpm
lab1\db\fulladder.cmp.cdb
lab1\db\fulladder.cmp.hdb
lab1\db\fulladder.cmp.idb
lab1\db\fulladder.cmp.kpt
lab1\db\fulladder.cmp.logdb
lab1\db\fulladder.cmp.rdb
lab1\db\fulladder.cmp0.ddb
lab1\db\fulladder.cmp1.ddb
lab1\db\fulladder.cmp_merge.kpt
lab1\db\fulladder.db_info
lab1\db\fulladder.fit.qmsg
lab1\db\fulladder.hier_info
lab1\db\fulladder.hif
lab1\db\fulladder.ipinfo
lab1\db\fulladder.lpc.html
lab1\db\fulladder.lpc.rdb
lab1\db\fulladder.lpc.txt
lab1\db\fulladder.map.ammdb
lab1\db\fulladder.map.bpm
lab1\db\fulladder.map.cdb
lab1\db\fulladder.map.hdb
lab1\db\fulladder.map.kpt
lab1\db\fulladder.map.logdb
lab1\db\fulladder.map.qmsg
lab1\db\fulladder.map.rdb
lab1\db\fulladder.map_bb.cdb
lab1\db\fulladder.map_bb.hdb
lab1\db\fulladder.map_bb.logdb
lab1\db\fulladder.pre_map.hdb
lab1\db\fulladder.pti_db_list.ddb
lab1\db\fulladder.root_partition.map.reg_db.cdb
lab1\db\fulladder.routing.rdb
lab1\db\fulladder.rpp.qmsg
lab1\db\fulladder.rtlv.hdb
lab1\db\fulladder.rtlv_sg.cdb
lab1\db\fulladder.rtlv_sg_swap.cdb
lab1\db\fulladder.sgate.rvd
lab1\db\fulladder.sgate_sm.rvd
lab1\db\fulladder.sgdiff.cdb
lab1\db\fulladder.sgdiff.hdb
lab1\db\fulladder.sld_design_entry.sci
lab1\db\fulladder.sld_design_entry_dsc.sci
lab1\db\fulladder.smart_action.txt
lab1\db\fulladder.sta.qmsg
lab1\db\fulladder.sta.rdb
lab1\db\fulladder.sta_cmp.6_slow.tdb
lab1\db\fulladder.syn_hier_info
lab1\db\fulladder.tis_db_list.ddb
lab1\db\fulladder.vpr.ammdb
lab1\db\logic_util_heursitic.dat
lab1\db\prev_cmp_fulladder.qmsg
lab1\fulladder.qpf
lab1\fulladder.qsf
lab1\fulladder.qws
lab1\fulladder.v
lab1\fulladder.v.bak
lab1\incremental_db\compiled_partitions\fulladder.db_info
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.ammdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.cdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.dfp
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.hdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.kpt
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.logdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.cmp.rcfdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.cdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.dpi
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.hbdb.cdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.hbdb.hb_info
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.hbdb.hdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.hbdb.sig
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.hdb
lab1\incremental_db\compiled_partitions\fulladder.root_partition.map.kpt
lab1\incremental_db\README
lab1\output_files\fulladder.asm.rpt
lab1\output_files\fulladder.done
lab1\output_files\fulladder.fit.rpt
lab1\output_files\fulladder.fit.smsg
lab1\output_files\fulladder.fit.summary
lab1\output_files\fulladder.flow.rpt
lab1\output_files\fulladder.jdi
lab1\output_files\fulladder.map.rpt
lab1\output_files\fulladder.map.summary
lab1\output_files\fulladder.pin
lab1\output_files\fulladder.pof
lab1\output_files\fulladder.sof
lab1\output_files\fulladder.sta.rpt
lab1\output_files\fulladder.sta.summary
lab1\incremental_db\compiled_partitions
lab1\db
lab1\incremental_db
lab1\output_files
lab1
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