Title: Avgt_jesd204b_ad9250_ed
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Download- Category:
- VHDL-FPGA-Verilog
- Platform:
- Verilog
- File Size:
- 7836KB
- Update:
- 2017-07-28
- Downloads:
- 0
- Uploaded by:
- wang jiang
Description: Avgt development board based on the jesd204b source code
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avgt_jesd204b_ad9250_ed_14.0.qar