VHDL code co-simulation

test_hwcosim.mdl
test_hwcosim_sysgen.log
test_hwcosim_sysgen_error.log
test_hwcosim.mdl.autosave
cosim_result.GIF
netlist\blockCoreMap
.......\commandLines
.......\globals
.......\hdlFiles
.......\isim_test_hwcosim.prj
.......\jtagcosim_top.ucf
.......\jtagcosim_top.vhd
.......\name_translations
.......\ProjectGeneration.tcl
.......\SgIseProject.tcl
.......\synopsis
.......\synth_model
.......\...........\globals
.......\...........\hdlFiles
.......\...........\isim_test_hwcosim.prj
.......\...........\synopsis
.......\...........\test_hwcosim.vhd
.......\...........\test_hwcosim_cw.gise
.......\...........\test_hwcosim_cw.ngc
.......\...........\test_hwcosim_cw.sdc
.......\...........\test_hwcosim_cw.sgp
.......\...........\test_hwcosim_cw.syr
.......\...........\test_hwcosim_cw.vhd
.......\...........\test_hwcosim_cw.xcf
.......\...........\test_hwcosim_cw.xise
.......\...........\vcom.do
.......\...........\xlpersistentdff.ngc
.......\...........\xst_test_hwcosim.prj
.......\...........\xst_test_hwcosim.scr
.......\synth_wrapper
.......\.............\jtagcosim_top.ngc
.......\.............\jtagcosim_top.syr
.......\.............\jtagcosim_top.vhd
.......\.............\xst_jtagcosim_top.prj
.......\.............\xst_jtagcosim_top.scr
.......\sysgen
.......\......\consolidate.log
.......\......\globals
.......\......\hdlFiles
.......\......\isim_test_hwcosim.prj
.......\......\masterScript8011221680877905416.pl
.......\......\nonleaf_results.vhd
.......\......\perl_results.vhd
.......\......\script_results8991468121593510345
.......\......\synopsis
.......\......\synopsis.1
.......\......\synopsis.2
.......\......\synopsis.diff
.......\......\test_hwcosim.vhd
.......\......\test_hwcosim_cw.sdc
.......\......\test_hwcosim_cw.ucf
.......\......\test_hwcosim_cw.vhd
.......\......\test_hwcosim_cw.xcf
.......\......\vcom.do
.......\......\xlpersistentdff.ngc
.......\......\xst_test_hwcosim.prj
.......\......\xst_test_hwcosim.scr
.......\sysgen_hw_cosim_interface.vhd
.......\test_hwcosim.vhd
.......\test_hwcosim_cw.bit
.......\test_hwcosim_cw.gise
.......\test_hwcosim_cw.hwc
.......\test_hwcosim_cw.sdc
.......\test_hwcosim_cw.sgp
.......\test_hwcosim_cw.ucf
.......\test_hwcosim_cw.vhd
.......\test_hwcosim_cw.xcf
.......\test_hwcosim_cw.xise
.......\test_hwcosim_cw_import.log
.......\test_hwcosim_hwcosim_lib.mdl
.......\vcom.do
.......\xflow
.......\.....\balanced_jtag.opt
.......\.....\bitgen_jtag.opt
.......\.....\commandLines
.......\.....\fpga.flw
.......\.....\jtagcosim_iface_spartan3.ngc
.......\.....\jtagcosim_iface_spartan6.ngc
.......\.....\jtagcosim_iface_virtex4.ngc
.......\.....\jtagcosim_iface_virtex5.ngc
.......\.....\jtagcosim_iface_virtex6.ngc
.......\.....\jtagcosim_iface_virtex7.ngc
.......\.....\jtagcosim_top.bgn
.......\.....\jtagcosim_top.bit
.......\.....\jtagcosim_top.bld
.......\.....\jtagcosim_top.drc
.......\.....\jtagcosim_top.ncd
.......\.....\jtagcosim_top.ngc
.......\.....\jtagcosim_top.ngd
.......\.....\jtagcosim_top.pad
.......\.....\jtagcosim_top.par
.......\.....\jtagcosim_top.pcf
.......\.....\jtagcosim_top.ptwx
.......\.....\jtagcosim_top.ucf
.......\.....\jtagcosim_top.unroutes

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