Open-source Spartan-6 compatible project that implements a USB digital scope firmware by alown, including tests.

scope-firmware-master
.....................\.gitignore
.....................\testboard
.....................\.........\HardwareProfile - PICDEM FSUSB.h
.....................\.........\HardwareProfile.h
.....................\.........\main.c
.....................\.........\rm18f4550 - HID Bootload.lkr
.....................\.........\testboard.mcp
.....................\.........\testboard.mcw
.....................\.........\usb_config.h
.....................\.........\usb_descriptors.c
.....................\xc6
.....................\...\par
.....................\...\...\adc_timing.ucf
.....................\...\...\ddr3mem.ucf
.....................\...\...\pins.ucf
.....................\...\sim
.....................\...\...\adc
.....................\...\...\...\adc.wcfg
.....................\...\...\...\adc_tb.vhd
.....................\...\...\...\adcbclk.wcfg
.....................\...\...\...\adcbclk_tb.vhd
.....................\...\...\...\adcbuf.wcfg
.....................\...\...\...\adcbuf_tb.vhd
.....................\...\...\...\adccal.wcfg
.....................\...\...\...\adccal_tb.vhd
.....................\...\...\...\adcdata.wcfg
.....................\...\...\...\adcdata_tb.vhd
.....................\...\...\...\adcfclk.wcfg
.....................\...\...\...\adcfclk_tb.vhd
.....................\...\...\clockbuf_tb.vhd
.....................\...\...\ddr3mem
.....................\...\...\.......\afifo.vhd
.....................\...\...\.......\cmd_gen.vhd
.....................\...\...\.......\cmd_prbs_gen.vhd
.....................\...\...\.......\data_prbs_gen.vhd
.....................\...\...\.......\ddr3_model_c3.v
.....................\...\...\.......\ddr3_model_parameters_c3.vh
.....................\...\...\.......\init_mem_pattern_ctr.vhd
.....................\...\...\.......\mcb_flow_control.vhd
.....................\...\...\.......\mcb_traffic_gen.vhd
.....................\...\...\.......\memc3_tb_top.vhd
.....................\...\...\.......\rd_data_gen.vhd
.....................\...\...\.......\read_data_path.vhd
.....................\...\...\.......\read_posted_fifo.vhd
.....................\...\...\.......\sim_tb_top.vhd
.....................\...\...\.......\sp6_data_gen.vhd
.....................\...\...\.......\tg_status.vhd
.....................\...\...\.......\v6_data_gen.vhd
.....................\...\...\.......\wr_data_gen.vhd
.....................\...\...\.......\write_data_path.vhd
.....................\...\...\fx3.wcfg
.....................\...\...\fx3_tb.vhd
.....................\...\...\memwrapper.wcfg
.....................\...\...\memwrapper_tb.vhd
.....................\...\...\think.wcfg
.....................\...\...\think_tb.vhd
.....................\...\src
.....................\...\...\adc
.....................\...\...\...\adc.vhd
.....................\...\...\...\adcbclk.vhd
.....................\...\...\...\adcbuf.vhd
.....................\...\...\...\adccal.vhd
.....................\...\...\...\adcdata.vhd
.....................\...\...\...\adcfclk.vhd
.....................\...\...\...\adcspi.vhd
.....................\...\...\cfgcontroller.vhd
.....................\...\...\clockbuf.vhd
.....................\...\...\datawrapper.vhd
.....................\...\...\ddr3mem
.....................\...\...\.......\ddr3mem.vhd
.....................\...\...\.......\iodrp_controller.vhd
.....................\...\...\.......\iodrp_mcb_controller.vhd
.....................\...\...\.......\mcb_raw_wrapper.vhd
.....................\...\...\.......\mcb_soft_calibration.vhd
.....................\...\...\.......\mcb_soft_calibration_top.vhd
.....................\...\...\.......\memc3_infrastructure.vhd
.....................\...\...\.......\memc3_wrapper.vhd
.....................\...\...\fx3.vhd
.....................\...\...\input.vhd
.....................\...\...\main.vhd
.....................\...\...\memwrapper.vhd
.....................\...\...\monitoring.vhd
.....................\...\...\think.vhd
.....................\...\syn
.....................\...\...\filter.filter
.....................\...\...\ipcore_

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