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verilogsram

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 305kb
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  • Author :ren
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Introduction - If you have any usage issues, please Google them yourself
On CPLD routine.Chip for MAXII, in quartusII under development, and is a read routine of the external memory.
Packet file list
(Preview for download)
verilogsram\db\prev_cmp_sram_test.asm.qmsg
...........\..\prev_cmp_sram_test.eda.qmsg
...........\..\prev_cmp_sram_test.fit.qmsg
...........\..\prev_cmp_sram_test.map.qmsg
...........\..\prev_cmp_sram_test.qmsg
...........\..\prev_cmp_sram_test.tan.qmsg
...........\..\sram_test.asm.qmsg
...........\..\sram_test.asm_labs.ddb
...........\..\sram_test.cbx.xml
...........\..\sram_test.cmp.cdb
...........\..\sram_test.cmp.hdb
...........\..\sram_test.cmp.kpt
...........\..\sram_test.cmp.logdb
...........\..\sram_test.cmp.rdb
...........\..\sram_test.cmp.tdb
...........\..\sram_test.cmp0.ddb
...........\..\sram_test.db_info
...........\..\sram_test.eco.cdb
...........\..\sram_test.eda.qmsg
...........\..\sram_test.fit.qmsg
...........\..\sram_test.hier_info
...........\..\sram_test.hif
...........\..\sram_test.lpc.html
...........\..\sram_test.lpc.rdb
...........\..\sram_test.lpc.txt
...........\..\sram_test.map.cdb
...........\..\sram_test.map.hdb
...........\..\sram_test.map.logdb
...........\..\sram_test.map.qmsg
...........\..\sram_test.pre_map.cdb
...........\..\sram_test.pre_map.hdb
...........\..\sram_test.rpp.qmsg
...........\..\sram_test.rtlv.hdb
...........\..\sram_test.rtlv_sg.cdb
...........\..\sram_test.rtlv_sg_swap.cdb
...........\..\sram_test.sgate.rvd
...........\..\sram_test.sgate_sm.rvd
...........\..\sram_test.sgdiff.cdb
...........\..\sram_test.sgdiff.hdb
...........\..\sram_test.sld_design_entry.sci
...........\..\sram_test.sld_design_entry_dsc.sci
...........\..\sram_test.smp_dump.txt
...........\..\sram_test.syn_hier_info
...........\..\sram_test.tan.qmsg
...........\..\sram_test.tis_db_list.ddb
...........\..\sram_test.tmw_info
...........\..\sram_test_global_asgn_op.abo
...........\incremental_db\compiled_partitions\sram_test.root_partition.map.kpt
...........\..............\README
...........\simulation\modelsim\maxii_atoms.v
...........\..........\........\sram_test.sft
...........\..........\........\sram_test.vo
...........\..........\........\sram_test_modelsim.xrf
...........\..........\........\sram_test_v.sdo
...........\..........\........\tb_sramtest.v
...........\sram_test.asm.rpt
...........\sram_test.cdf
...........\sram_test.done
...........\sram_test.dpf
...........\sram_test.eda.rpt
...........\sram_test.fit.rpt
...........\sram_test.fit.smsg
...........\sram_test.fit.summary
...........\sram_test.flow.rpt
...........\sram_test.map.rpt
...........\sram_test.map.summary
...........\sram_test.pin
...........\sram_test.pof
...........\sram_test.qpf
...........\sram_test.qsf
...........\sram_test.qws
...........\sram_test.tan.rpt
...........\sram_test.tan.summary
...........\sram_test.v
...........\sram_test_assignment_defaults.qdf
...........\incremental_db\compiled_partitions
...........\simulation\modelsim
...........\db
...........\incremental_db
...........\simulation
verilogsram
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