8051ip nuclear, can be used for ic design and FPGA soft-core use of ip

8051_latest\8051\tags\rel0\.nclaunch.dd
...........\....\....\....\asm\cast.c
...........\....\....\....\...\counter_test.asm
...........\....\....\....\...\DIV16U.asm
...........\....\....\....\...\divmul.c
...........\....\....\....\...\fib.c
...........\....\....\....\...\gcd.c
...........\....\....\....\...\hex\cast.hex
...........\....\....\....\...\...\counter_test.hex
...........\....\....\....\...\...\div16u.hex
...........\....\....\....\...\...\divmul.hex
...........\....\....\....\...\...\fib.hex
...........\....\....\....\...\...\gcd.hex
...........\....\....\....\...\...\int2bin.hex
...........\....\....\....\...\...\interrupt_test.hex
...........\....\....\....\...\...\lcall.hex
...........\....\....\....\...\...\negcnt.hex
...........\....\....\....\...\...\r_bank.hex
...........\....\....\....\...\...\serial.hex
...........\....\....\....\...\...\serial_test.hex
...........\....\....\....\...\...\sort.hex
...........\....\....\....\...\...\sqroot.hex
...........\....\....\....\...\...\testall.hex
...........\....\....\....\...\...\timer.hex
...........\....\....\....\...\...\timer_test.hex
...........\....\....\....\...\...\xram.hex
...........\....\....\....\...\...\xram_m.ihx
...........\....\....\....\...\in\cast.in
...........\....\....\....\...\..\counter_test.in
...........\....\....\....\...\..\div16u.in
...........\....\....\....\...\..\divmul.in
...........\....\....\....\...\..\fib.in
...........\....\....\....\...\..\gcd.in
...........\....\....\....\...\..\int2bin.in
...........\....\....\....\...\..\interrupt_test.in
...........\....\....\....\...\..\lcall.in
...........\....\....\....\...\..\negcnt.in
...........\....\....\....\...\..\r_bank.in
...........\....\....\....\...\..\serial.in
...........\....\....\....\...\..\serial_test.in
...........\....\....\....\...\..\sort.in
...........\....\....\....\...\..\sqroot.in
...........\....\....\....\...\..\testall.in
...........\....\....\....\...\..\timer.in
...........\....\....\....\...\..\timer_test.in
...........\....\....\....\...\..\xram.in
...........\....\....\....\...\..\xram_m.in
...........\....\....\....\...\int2bin.c
...........\....\....\....\...\interrupt_test.asm
...........\....\....\....\...\lcall.asm
...........\....\....\....\...\negcnt.c
...........\....\....\....\...\r_bank.asm
...........\....\....\....\...\serial.asm
...........\....\....\....\...\serial_test.asm
...........\....\....\....\...\sort.c
...........\....\....\....\...\sqroot.c
...........\....\....\....\...\test.asm
...........\....\....\....\...\testall.c
...........\....\....\....\...\timer.asm
...........\....\....\....\...\timer_test.asm
...........\....\....\....\...\v\cast.v
...........\....\....\....\...\.\counter_test.v
...........\....\....\....\...\.\div16u.v
...........\....\....\....\...\.\divmul.v
...........\....\....\....\...\.\fib.v
...........\....\....\....\...\.\gcd.v
...........\....\....\....\...\.\int2bin.v
...........\....\....\....\...\.\interrupt_test.v
...........\....\....\....\...\.\lcall.v
...........\....\....\....\...\.\negcnt.v
...........\....\....\....\...\.\r_bank.v
...........\....\....\....\...\.\serial.v
...........\....\....\....\...\.\serial_test.v
...........\....\....\....\...\.\sort.v
...........\....\....\....\...\.\sqroot.v
...........\....\....\....\...\.\testall.v
...........\....\....\....\...\.\timer.v
...........\....\....\....\...\.\timer_test.v
...........\....\....\....\...\.\xram.v
...........\....\....\....\...\.\xram_m.v
...........\....\....\....\...\.ec\cast.vec
...........\....\....\....\...\...\counter_test.vec
...........\....\....\....\...\...\div16u.vec
...........\....\....\....\...\...\divmul.vec
...........\....\....\....\...\...\fib.vec
...........\....\....\....\...\...\gcd.vec
...........\....\....\....\...\...\int2bin.vec
...........\....\....\....\...\...\interrupt_test.vec
...........\....\....\....\...\...\lcall.vec
...........\....\....\....\...\...\negcnt.vec
...........\....\....\....\...\...\r_bank.vec
...........\....\....\....\...\...\serial.vec
...........\....\....\....\...\...

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