clock generator can demonstrate minutes and seconds, hours, the next to the FPGA tested normal function

Packet : 25811223clock_2.rar filelist
clock_2
clock_2\clock.pin
clock_2\clock.qpf
clock_2\chooser.v
clock_2\clock.v
clock_2\clock.qsf
clock_2\clock.map.rpt
clock_2\decoder.v
clock_2\clock.flow.rpt
clock_2\clock.map.summary
clock_2\clock.map.eqn
clock_2\clock.done
clock_2\clock.fit.eqn
clock_2\clock.fit.rpt
clock_2\clock.fit.summary
clock_2\clock.asm.rpt
clock_2\clock.tan.summary
clock_2\clock.tan.rpt
clock_2\clock.vwf
clock_2\clock.sim.rpt
clock_2\clock.qws
clock_2\counter24.v
clock_2\cmp_state.ini
clock_2\counter60.v
clock_2\clock
clock_2\clock\counter24.v
clock_2\clock\clock.v
clock_2\clock\chooser.v
clock_2\clock\counter60.v
clock_2\clock\decoder.v
clock_2\clock\clock.qpf
clock_2\clock\clock.qsf
clock_2\clock\clock.map.eqn
clock_2\clock\clock.map.rpt
clock_2\clock\clock.flow.rpt
clock_2\clock\clock.map.summary
clock_2\clock\clock.fit.eqn
clock_2\clock\clock.pin
clock_2\clock\clock.fit.rpt
clock_2\clock\clock.fit.summary
clock_2\clock\clock.asm.rpt
clock_2\clock\clock.tan.summary
clock_2\clock\clock.tan.rpt
clock_2\clock\clock.done
clock_2\clock\clock.qws
clock_2\clock\cmp_state.ini
clock_2\clock\db
clock_2\clock\db\clock.db_info
clock_2\clock\db\clock.sld_design_entry.sci
clock_2\clock\db\clock.rtlv_sg.cdb
clock_2\clock\db\clock.map.qmsg
clock_2\clock\db\clock.eco.cdb
clock_2\clock\db\clock.cmp.rdb
clock_2\clock\db\clock.rtlv.hdb
clock_2\clock\db\clock.asm.qmsg
clock_2\clock\db\clock.cmp.hdb
clock_2\clock\db\clock.cbx.xml
clock_2\clock\db\clock_cmp.qrpt
clock_2\clock\db\clock.hif
clock_2\clock\db\clock.(0).cnf.cdb
clock_2\clock\db\clock.(0).cnf.hdb
clock_2\clock\db\clock.(1).cnf.cdb
clock_2\clock\db\clock.(1).cnf.hdb
clock_2\clock\db\clock.(2).cnf.cdb
clock_2\clock\db\clock.(2).cnf.hdb
clock_2\clock\db\clock.(3).cnf.cdb
clock_2\clock\db\clock.(3).cnf.hdb
clock_2\clock\db\clock.(4).cnf.cdb
clock_2\clock\db\clock.(4).cnf.hdb
clock_2\clock\db\clock.hier_info
clock_2\clock\db\clock.rtlv_sg_swap.cdb
clock_2\clock\db\clock.pre_map.hdb
clock_2\clock\db\clock.pre_map.cdb
clock_2\clock\db\clock.sgdiff.cdb
clock_2\clock\db\clock.sgdiff.hdb
clock_2\clock\db\clock.psp
clock_2\clock\db\clock.sld_design_entry_dsc.sci
clock_2\clock\db\clock.fit.qmsg
clock_2\clock\db\clock.map.cdb
clock_2\clock\db\clock.syn_hier_info
clock_2\clock\db\clock.map.hdb
clock_2\clock\db\clock.signalprobe.cdb
clock_2\clock\db\clock.cmp.cdb
clock_2\clock\db\clock.tan.qmsg
clock_2\clock\db\clock.cmp0.ddb
clock_2\clock\db\clock.cmp.tdb
clock_2\bac
clock_2\bac\decoder.v
clock_2\bac\counter60.v
clock_2\bac\counter24.v
clock_2\db
clock_2\db\clock.hif
clock_2\db\clock.db_info
clock_2\db\clock.tan.qmsg
clock_2\db\clock.(0).cnf.cdb
clock_2\db\clock.cmp.rdb
clock_2\db\clock.(0).cnf.hdb
clock_2\db\clock.(1).cnf.cdb
clock_2\db\clock.sld_design_entry.sci
clock_2\db\clock.(1).cnf.hdb
clock_2\db\clock.cbx.xml
clock_2\db\clock_cmp.qrpt
clock_2\db\clock.(3).cnf.cdb
clock_2\db\clock.(2).cnf.cdb
clock_2\db\clock.(2).cnf.hdb
clock_2\db\clock.(3).cnf.hdb
clock_2\db\clock.(4).cnf.cdb
clock_2\db\clock.(4).cnf.hdb
clock_2\db\clock.rtlv_sg_swap.cdb
clock_2\db\clock.hier_info
clock_2\db\clock.map.cdb
clock_2\db\clock.map.qmsg
clock_2\db\clock.eco.cdb
clock_2\db\clock.pre_map.hdb
clock_2\db\clock.pre_map.cdb
clock_2\db\clock.map.hdb
clock_2\db\clock.psp
clock_2\db\clock.rtlv_sg.cdb
clock_2\db\clock.rtlv.hdb
clock_2\db\clock.fit.qmsg
clock_2\db\clock.syn_hier_info
clock_2\db\clock.sgdiff.cdb
clock_2\db\clock.signalprobe.cdb
clock_2\db\clock.sim.qmsg
clock_2\db\clock.sim.vwf
clock_2\db\clock.sim.rdb
clock_2\db\clock.sgdiff.hdb
clock_2\db\clock.sld_design_entry_dsc.sci
clock_2\db\clock.asm.qmsg
clock_2\db\clock.eds_overflow
clock_2\db\clock.sim.hdb
clock_2\db\clock.cmp.cdb
clock_2\db\clock_sim.qrpt
clock_2\db\clock.cmp0.ddb
clock_2\db\clock.cmp.hdb
clock_2\db\clock.cmp.tdb

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