VHDL to achieve 8-bit multiplier

multi8x8
........\add4b.vhd
........\ADDER8B.vhd
........\ANDARITH.vhd
........\ARICTL.vhd
........\db
........\..\add_sub_4rh.tdf
........\..\add_sub_f7i.tdf
........\..\add_sub_hnh.tdf
........\..\multi8x8.analyze_file.qmsg
........\..\multi8x8.asm.qmsg
........\..\multi8x8.cbx.xml
........\..\multi8x8.cmp.cdb
........\..\multi8x8.cmp.hdb
........\..\multi8x8.cmp.qrpt
........\..\multi8x8.cmp.rdb
........\..\multi8x8.cmp.tdb
........\..\multi8x8.cmp0.ddb
........\..\multi8x8.dbp
........\..\multi8x8.db_info
........\..\multi8x8.eco.cdb
........\..\multi8x8.eds_overflow
........\..\multi8x8.fit.qmsg
........\..\multi8x8.fnsim.cdb
........\..\multi8x8.fnsim.hdb
........\..\multi8x8.fnsim.qmsg
........\..\multi8x8.hier_info
........\..\multi8x8.hif
........\..\multi8x8.map.cdb
........\..\multi8x8.map.hdb
........\..\multi8x8.map.qmsg
........\..\multi8x8.pre_map.cdb
........\..\multi8x8.pre_map.hdb
........\..\multi8x8.psp
........\..\multi8x8.rtlv.hdb
........\..\multi8x8.rtlv_sg.cdb
........\..\multi8x8.rtlv_sg_swap.cdb
........\..\multi8x8.sgdiff.cdb
........\..\multi8x8.sgdiff.hdb
........\..\multi8x8.signalprobe.cdb
........\..\multi8x8.sim.hdb
........\..\multi8x8.sim.qmsg
........\..\multi8x8.sim.qrpt
........\..\multi8x8.sim.rdb
........\..\multi8x8.sld_design_entry.sci
........\..\multi8x8.sld_design_entry_dsc.sci
........\..\multi8x8.syn_hier_info
........\..\multi8x8.tan.qmsg
........\multi8x8.asm.rpt
........\multi8x8.bdf
........\multi8x8.done
........\multi8x8.fit.eqn
........\multi8x8.fit.rpt
........\multi8x8.fit.summary
........\multi8x8.flow.rpt
........\multi8x8.map.eqn
........\multi8x8.map.rpt
........\multi8x8.map.summary
........\multi8x8.pin
........\multi8x8.pof
........\multi8x8.qpf
........\multi8x8.qsf
........\multi8x8.qws
........\multi8x8.sim.rpt
........\multi8x8.sof
........\multi8x8.tan.rpt
........\multi8x8.tan.summary
........\multi8x8.vwf
........\REG16B.vhd
........\SREG8B.vhd

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